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Fixed CCRs: SPB 17.2 HF022
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2 b. f& Y# ~0 @6 {# DCCRID Product ProductLevel2 Title% k0 a9 ~. B+ ]" p6 B
+ r9 S4 P7 j% r, G1 p4 i========================================================================================================================================================9 [5 Y+ x, m: |1 h) L2 Z. e, s. |3 D. X( R; U( G) S
1755789 ADW DBEDITOR Checking in HSS Block returns 'Failed to create archive'7 C% h8 n0 T+ c) t5 ]
1731459 ADW FLOW_MGR Cannot open LRM from Flow Manager2 D, w* b% E. B1 w" X& h2 s$ i6 |: p! e6 Z
8 f0 n- O4 |+ {+ ^7 {* T7 U1731460 ADW FLOW_MGR Cannot open LRM from Flow Manager
}! K* {8 E* \# Y( Z1744081 ADW FLOW_MGR Error regarding configuration file when trying to open Workflow Manager
" W: h: R s V; u9 ^' z8 i1756727 ADW LIBIMPORT EDM Library Import fails with java exceptions when merging classifications. h; f% P7 N. S3 L4 B
1743763 ADW SRM Find filter is grayed out when allegro PCB Editor is opened from EDM Flow Manager/ y' ]' D) T8 ~* c. w. C
1748399 ALLEGRO_EDITOR DATABASE In release 17.2-2016, end caps not visible for certain clines in PCB Editor0 |7 \2 O: | T# c0 X+ O$ M$ ]* }7 |- j1 g) ~
1748522 ALLEGRO_EDITOR INTERACTIV A component mirrored using the 'funckey' command jumps to (0,0) position when the 'move' command is used on it% G: i) o* ]: q% B4 ]+ \# I+ ?! T$ P
1734983 ALLEGRO_EDITOR INTERFACES Secondary step model does not stay mapped after drawing is reopened
8 p1 V. _9 W* ?- I. Q1753704 ALLEGRO_EDITOR REFRESH Refreshing symbols crashes PCB Editor0 z( R3 a, f2 g$ w! d& Q0 _1 ]* G ]0 A/ I& z' O
1493721 ALLEGRO_EDITOR SHAPE Voids on negative planes are not adhering to constraints B6 c U. h" @& K: ]8 e
1711242 ALLEGRO_EDITOR SHAPE Route keep out leads to partly unfilled shapes with gaps* W' E' Z2 c6 K3 W) J1 [& C" s3 E0 }! N5 p# [* C/ J3 G
1726865 ALLEGRO_EDITOR UI_GENERAL Pop-up Mirror command does not mirror at cursor position: V' }! V: o6 c3 B8 b* k9 H) z" w: N- ?6 q6 A) F5 w! v+ C
1752987 ALLEGRO_EDITOR UI_GENERAL axlUIViewFileCreate zoom to xy location not working while in user created form.5 Y7 o4 e) ~0 O% e2 Z5 d# D
1755638 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016, zoom operations using mouse button not working when axlShellPost() is run- C c& h: N) v* T( U
1719792 ALLEGRO_PROD_TOOLB CORE Productivity Toolbox Z-DRC hangs or crashes PCB Editor$ K4 E" ~8 K8 ~9 X
1624869 ALTM_TRANSLATOR CAPTURE A structure file is required to translate a third-party schematic to orcad Capture5 h) N& {5 y# @
) z3 A% n$ ^8 s/ ]0 D, C# e1707416 ALTM_TRANSLATOR CAPTURE Missing components and pins in the OrCAD Capture schematic translated from a third-party tool
5 ?6 q- o: J9 s1708825 ALTM_TRANSLATOR CAPTURE The third-party translator fails to translate the schematic+ C9 ]1 Y, w4 s
6 C( m* R+ Y0 e* g1719200 ALTM_TRANSLATOR CAPTURE The third-party translator fails to translate all the pages of a schematic
& D9 v+ F" y* ?- L8 I+ j! y6 X1546070 ALTM_TRANSLATOR CORE Third-party to DE-HDL schematic translation fails4 B1 C. ] f# |, ~) R8 P. e* y4 `; j3 L/ t+ b
1700508 ALTM_TRANSLATOR CORE Third-party PCB translator does not work in release 17.2-20163 w' Q, B* f/ U6 q" f- j5 P7 V
1699340 ALTM_TRANSLATOR DE_HDL Unable to import third-party schematic into DE-HDL using Import menu in PCB Editor% M# g% n; d' K) Y2 G- y, Y
1630379 ALTM_TRANSLATOR PCB_EDITOR Third-party translator is not importing clines and vias+ M6 w# P. r% o4 N/ h( } S- K0 ~. _ H6 [
1708615 ALTM_TRANSLATOR PCB_EDITOR All items of third-party PCB not imported in release 17.2-20165 K; p5 P) [( l; r* |: ~6 ^: ^
& D9 t3 \ C. h1 \* r1758296 APD DXF_IF DXF OUT: Rounded rectangle pads mirrored incorrectly
' N+ P. L6 l* A3 b1756040 APD IMPORT_DATA The 'die text in' command ignores values after the decimal point; p3 O7 w) ~/ K# ^; u7 ^- D* _- H
# J6 t- j k" l- Y9 f1727206 APD SHAPE Merging two shapes results in an incorrect shape. b7 j$ \$ h; f0 e+ r+ k0 a5 a' B8 Z- g2 b8 z8 C, k
1753682 CONCEPT_HDL CONSTRAINT_MG Constraint Manager stops responding while cross probing DE-HDL0 U0 j+ z6 {$ t, n9 I
1721334 CONCEPT_HDL CORE dsreportgen not able to resolve gated part on schematic
6 \+ _5 b: x# J9 h3 a1747559 CONCEPT_HDL CORE Copying a logic symbol without a part table entry results in ERROR(SPCODD-53)9 P' k2 i6 F, w) N% Y' b4 H; j* j& W1 q9 \; W
1749644 CONCEPT_HDL CORE In release 17.2-2016 Hotfix 019, 'align components' is not working on Windows 8 and DE-HDL crashes
" W9 G/ N6 j4 |0 ~2 \: e1746910 CONCEPT_HDL GLOBALCHANGE Global Component Change unable to identify part data when using schematic pick option) g1 d% F: {9 T; v# V; J; A8 ^% I2 V7 }4 S
1743572 FLOWS PROJMGR Project Manager displays incorrect values in Project Setting1 _1 M4 m; C, x: }1 X& g! H. ]% Y3 j/ l4 }7 {. X( ~
1724124 FSP DESIGN_EXPLOR Provide TCL command to filter design connectivity window) c! K1 Y' J3 Z1 C* \0 K, h9 r& X: }9 H2 @- j2 y, S% x
1719105 FSP GUI Tabular sorting not working in FPGA System Planner) [7 I5 o7 u' y, [) Q5 ?
1755750 PCB_LIBRARIAN GRAPHICAL_EDI In release 17.2-2016, unable to delete _N pins in PDV Symbol Editor' \! R# ~! l0 D, q4 P
1722993 PCB_LIBRARIAN IMPORT_CSV Part Developer crashes while importing part information stored in a .csv file# V, A b0 p% h7 A p; ?! B
9 G5 b0 O z3 s+ i7 d. z1758856 SIP_layout 3D_VIEWER Correct the spelling error in the 3D Viewer Design Configuration window' m. x) g8 u0 Z; B) B* g$ {2 T! g, P9 ^: H% v, @- s7 U9 {
1755179 SIP_LAYOUT ARTWORK PCB Editor crashes when creating Gerber files# \8 x4 c0 g- o7 q& O
/ @! K' S. F, O: z/ b; `1743511 SIP_LAYOUT MANUFACTURING Package Design Integrity shows non-redundant padstacks in the Redundant Padstacks check% f( Q( ]2 `/ K4 V; c
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I- A$ l# D7 P1 |9 q9 t1 g链接:http://pan.baidu.com/s/1dFw4emH 密码:smbg |
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