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发表于 2013-12-20 17:39:55
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以下是更新内容; f8 Z4 ~ M0 J# J9 @. B
DATE: 11-15-2013 HOTFIX VERSION: 019
5 x+ |+ J$ F) |& a$ D7 z3 _$ X===================================================================================================================================' b- ^. j) C9 `4 U. e! @5 ?
CCRID PRODUCT PRODUCTLEVEL2 TITLE$ n6 ]: o$ T+ `. ^2 V, E
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, u5 A: A T- } O1176155 CONCEPT_HDL CORE Graphics remnants with 16.6 QIR 3
/ K4 Q. F$ I2 p7 N% }3 L1178272 CONCEPT_HDL OTHER Verilog netlist does not include split blocks correctly3 |6 d0 k3 j* h& A: v, w% c
1190782 FSP FPGA_SUPPORT Support for Altera > 5SGXEA9N2F45 device.
& w. U- t) v3 J) Z, X. e* C1194140 ADW LRM SYNC_PROPERTIES is not resolving issues a based sync_properties settings6 r# X3 J0 A4 N- m8 c" r$ W
1195744 APD EDIT_ETCH Diff_Pair routing fails on certain Uvias in the pair.
8 R& @7 v8 s, X5 g! j# u1196704 ALLEGRO_EDITOR INTERFACES ENH: During ipc2581 export checkboxes corresponding to 縈iscellaneous Image Layers� should automatically get selected
4 l7 }6 `6 L# Z7 f1198340 ALLEGRO_EDITOR OTHER Multiple -product option on the Allegro command line does not access the second -product( F2 K0 P. E; p! R& G8 X, \" }* q
1198596 ALLEGRO_EDITOR INTERFACES When copper thickness is increased for the outer layers, step Viewer does not show correct component position.
' E8 p0 w1 M! J8 h3 F1199673 PCB_LIBRARIAN OTHER Component Browser fails to load footrpints if they are set with UNC path6 ^' n6 b# J0 v% e/ A A6 A
1199889 ALLEGRO_EDITOR DATABASE Allegro crashing with latest hotfix.3 v$ C, N3 s; u8 t. F% Y9 D
1200303 ALLEGRO_EDITOR GRAPHICS 3D Viewer does not update after changing STEP model mapping
! f# H4 W/ P3 U( V2 j9 P1200449 ALLEGRO_EDITOR REPORTS Allegro crashes when generating Net Loop Report.
2 `0 C3 f$ Q' b1200915 ALLEGRO_EDITOR DATABASE Reducing accuracy of this specific design crashes Allegro
1 m4 w/ G9 v3 d' q( g9 B1201011 ADW COMPONENT_BROWSE Component Browser crashes in DB mode
8 T1 k: ?' e$ I6 H& d# d1201376 ALLEGRO_EDITOR INTERFACES Allegro hangs when trying to map a specific STEP model to a package drawing.3 w9 f' [, S, P( K& }5 p" y
1201897 SIP_LAYOUT IMPORT_DATA BGA Pin Colors not matching the Colors defined in the Symbol Spreadsheet after updating.
: N# {+ H" z" |5 O2 m1202709 ALLEGRO_EDITOR INTERFACES STEP File generated from Allegro is not overwritten when the variable "set ads_textrevs3 [" E( P" N3 k" K8 K; o& r
1202820 ALLEGRO_EDITOR INTERFACES Different xml generation for same step model on S106 and S017
& O' ]4 x+ z7 {1202842 ALLEGRO_EDITOR INTERFACES Step model invisible for one pin dra in allegro 16.6 symbol editor
1 c6 P6 G/ K0 w" |1 D1202983 ALLEGRO_EDITOR SHAPE Shape voiding creates DRC with Route Keepout
' i* d8 g9 p, o; U+ H& x; ?* t1203125 ALLEGRO_EDITOR OTHER Exporting STEP file with External copper enabled does not show all copper when viewed with Solid Edge or Inventor4 r* n7 ?. E/ }2 t/ }
1203236 ALLEGRO_EDITOR INTERFACES IPC2581 output with crosshatched shape is not correct
6 q5 a+ |8 M8 m* U/ @( E, D1203995 CONCEPT_HDL CHECKPLUS CheckPlus rule, local_signal_no_offpage_body, getting an incorrect failure.
0 i8 F1 ~: T& i; i+ e" I1204629 ALLEGRO_EDITOR SKILL axlUIDataBrowse crashes the editor or returns error
6 Y R; L* S9 e ?1 G; E! v1204640 SIP_LAYOUT DIE_EDITOR Concurrent co-design update fails
3 I- {: F8 a1 V0 j9 Y, ~: p1204881 SIP_LAYOUT BGA_GENERATOR Pin numbers are messed up after deleting a pin at a staggered bga
/ Z( o( ?* g+ s8 @1204885 CONCEPT_HDL CONSTRAINT_MGR Cant assign discrete models after the wrong model was removed." i1 ]/ D9 T. a. k, `2 e3 H8 Q
1205374 ALLEGRO_EDITOR OTHER pdf out command creates incorrect drill Symbol Characters placement in pdf file when setting film mirrored.) @4 B2 x4 G }: A+ `6 I" ?# a) ]
1205729 SIP_LAYOUT DIE_EDITOR update of codesign db fails on exit from die editor8 t: w# N' P$ I+ F+ W
1205801 ALLEGRO_EDITOR OTHER Tool crash when do export IPF./ M, _, E) S2 Z5 m: e2 d* o: Y
1205881 CONSTRAINT_MGR OTHER In CMGR , Objects > Create crashes Allegro |
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