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Fixed CCRs: SPB 17.2 HF022
3 w7 l. }2 p H# V06-16-2017 o1 T; \5 U5 L: N2 Z! B8 d E# e- ~& a: I k; B
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. k# I) [9 Q/ E6 UCCRID Product ProductLevel2 Title% k0 a9 ~. B+ ]" p6 B
' c/ C# D( ^+ x8 b/ D$ c: u========================================================================================================================================================9 [5 Y+ x, m: |1 h) L2 Z. e, s' `2 G) v* i1 u3 H& B
1755789 ADW DBEDITOR Checking in HSS Block returns 'Failed to create archive' _" I; N h9 R/ l2 p& p/ {
1731459 ADW FLOW_MGR Cannot open LRM from Flow Manager2 D, w* b% E. B1 w" X& h2 s$ i6 |: p! e6 Z" b, E2 ?( J% i: ~$ Q: `( X. y
1731460 ADW FLOW_MGR Cannot open LRM from Flow Manager
: q! e) H/ j+ f3 ?) U1744081 ADW FLOW_MGR Error regarding configuration file when trying to open Workflow Manager
; E- u# r5 i( i, M& ~1756727 ADW LIBIMPORT EDM Library Import fails with java exceptions when merging classifications
7 P5 [( T4 X9 ]4 e$ n1 X! o! ]1743763 ADW SRM Find filter is grayed out when allegro PCB Editor is opened from EDM Flow Manager
* G) q0 e! h/ l+ B; q1748399 ALLEGRO_EDITOR DATABASE In release 17.2-2016, end caps not visible for certain clines in PCB Editor0 |7 \2 O: | T# c0 X
! ?! \0 x" ?$ v9 {8 t( h6 l1748522 ALLEGRO_EDITOR INTERACTIV A component mirrored using the 'funckey' command jumps to (0,0) position when the 'move' command is used on it% G: i) o* ]: q% B
' s: I% x9 y: L! V. W' H, c# }9 L1734983 ALLEGRO_EDITOR INTERFACES Secondary step model does not stay mapped after drawing is reopened
2 }$ k* v7 y* _% I+ V2 c1753704 ALLEGRO_EDITOR REFRESH Refreshing symbols crashes PCB Editor0 z( R3 a, f2 g# M. x# \ B4 ~3 _
1493721 ALLEGRO_EDITOR SHAPE Voids on negative planes are not adhering to constraints
! G9 ?5 d) q& p1711242 ALLEGRO_EDITOR SHAPE Route keep out leads to partly unfilled shapes with gaps* W' E' Z2 c6 K3 W) J1 [
C2 L6 i9 ^8 J7 |$ Q1726865 ALLEGRO_EDITOR UI_GENERAL Pop-up Mirror command does not mirror at cursor position: V' }! V: o6 c3 B8 b* k1 m2 c; _ ~8 U5 h& j" q" K
1752987 ALLEGRO_EDITOR UI_GENERAL axlUIViewFileCreate zoom to xy location not working while in user created form.
: C* B2 W7 t/ l0 N8 C: M8 H1755638 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016, zoom operations using mouse button not working when axlShellPost() is run& t/ V- e3 d1 \( B
1719792 ALLEGRO_PROD_TOOLB CORE Productivity Toolbox Z-DRC hangs or crashes PCB Editor
, d. n. I% @& ]1624869 ALTM_TRANSLATOR CAPTURE A structure file is required to translate a third-party schematic to orcad Capture5 h) N& {5 y# @
% q& K& s1 w7 f/ _! {1707416 ALTM_TRANSLATOR CAPTURE Missing components and pins in the OrCAD Capture schematic translated from a third-party tool
?4 c0 P( }. Z1708825 ALTM_TRANSLATOR CAPTURE The third-party translator fails to translate the schematic+ C9 ]1 Y, w4 s
( r) @! p* _$ p B/ Y$ c1719200 ALTM_TRANSLATOR CAPTURE The third-party translator fails to translate all the pages of a schematic
* ?, G8 l" |( A S1546070 ALTM_TRANSLATOR CORE Third-party to DE-HDL schematic translation fails4 B1 C. ] f# |, ~) R8 P
V2 G/ }- v- Y8 s1 F4 s V1700508 ALTM_TRANSLATOR CORE Third-party PCB translator does not work in release 17.2-2016- t0 @9 Y8 E: D# S
1699340 ALTM_TRANSLATOR DE_HDL Unable to import third-party schematic into DE-HDL using Import menu in PCB Editor3 T) ?8 b/ | @
1630379 ALTM_TRANSLATOR PCB_EDITOR Third-party translator is not importing clines and vias+ M6 w# P. r% o4 N/ h8 x8 t9 @. P6 H0 s. u+ b) Q
1708615 ALTM_TRANSLATOR PCB_EDITOR All items of third-party PCB not imported in release 17.2-20165 K; p5 P) [( l; r* |: ~6 ^: ^
/ e4 [0 j. H7 f- {8 p1758296 APD DXF_IF DXF OUT: Rounded rectangle pads mirrored incorrectly2 F) L8 j+ A. j3 p
1756040 APD IMPORT_DATA The 'die text in' command ignores values after the decimal point; p3 O7 w) ~/ K# ^; u7 ^- D* _- H8 ~7 l+ c" V& E, O! O4 m
1727206 APD SHAPE Merging two shapes results in an incorrect shape. b7 j$ \$ h; f0 e+ r+ k0 a5 a' B
. H+ F( M1 x+ J) a, C$ I% B" h( T1753682 CONCEPT_HDL CONSTRAINT_MG Constraint Manager stops responding while cross probing DE-HDL w6 o0 `+ G* E' P6 z4 u5 u
1721334 CONCEPT_HDL CORE dsreportgen not able to resolve gated part on schematic
3 \: v$ v+ O3 W F0 k) U1747559 CONCEPT_HDL CORE Copying a logic symbol without a part table entry results in ERROR(SPCODD-53)9 P' k2 i6 F, w) N% Y' b4 H; j
# j- Q& j6 `7 ]! M/ t( q/ R! b7 j) K1749644 CONCEPT_HDL CORE In release 17.2-2016 Hotfix 019, 'align components' is not working on Windows 8 and DE-HDL crashes/ q( {/ d& R. w0 i! v
1746910 CONCEPT_HDL GLOBALCHANGE Global Component Change unable to identify part data when using schematic pick option) g1 d% F: {9 T; v# V; J) E* ]+ {" `! b7 V1 `7 L
1743572 FLOWS PROJMGR Project Manager displays incorrect values in Project Setting1 _1 M4 m; C, x: }1 X& g! H. ]
7 J* P# |* l3 t& u; b1724124 FSP DESIGN_EXPLOR Provide TCL command to filter design connectivity window) c! K1 Y' J3 Z1 C* \
& X2 q' e4 L% z7 Z2 n+ i5 F0 e' u8 v1719105 FSP GUI Tabular sorting not working in FPGA System Planner' o& c: ^6 k( G! _" v3 D
1755750 PCB_LIBRARIAN GRAPHICAL_EDI In release 17.2-2016, unable to delete _N pins in PDV Symbol Editor
' I- ]5 r! p* o' v1722993 PCB_LIBRARIAN IMPORT_CSV Part Developer crashes while importing part information stored in a .csv file# V, A b0 p% h7 A p; ?! B- N& Z2 G/ n5 Y D: A8 `
1758856 SIP_layout 3D_VIEWER Correct the spelling error in the 3D Viewer Design Configuration window' m. x) g8 u0 Z; B) B* g$ {
7 [% D4 l8 x1 R* E1755179 SIP_LAYOUT ARTWORK PCB Editor crashes when creating Gerber files# \8 x4 c0 g- o7 q& O
5 y+ _4 D0 e! o5 L1743511 SIP_LAYOUT MANUFACTURING Package Design Integrity shows non-redundant padstacks in the Redundant Padstacks check1 @2 V" w) Y* f
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, a- T: ^" T5 s$ s7 q4 m3 ~5 u9 K& d0 M: n链接：http://pan.baidu.com/s/1dFw4emH 密码：smbg |
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