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本帖最后由 深圳-绿皮 于 2013-11-22 10:14 编辑 g, R% t# k) h6 n# v
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DATE: 11-15-2013 HOTFIX VERSION: 019" }: D, c, C4 d. H
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1176155 CONCEPT_HDL CORE Graphics remnants with 16.6 QIR 3; x" v; d" b' x3 j+ f; V- C
1178272 CONCEPT_HDL OTHER Verilog netlist does not include split blocks correctly! d& B' \( f6 P7 G* z
1190782 FSP FPGA_SUPPORT Support for Altera > 5SGXEA9N2F45 device.
4 T' M/ y6 |2 ]2 Q! V6 p1194140 ADW LRM SYNC_PROPERTIES is not resolving issues a based sync_properties settings0 m3 B" _* y& ?5 n7 i
1195744 APD EDIT_ETCH Diff_Pair routing fails on certain Uvias in the pair.
j7 W# S, @& l% r" J1196704 allegro_EDITOR INTERFACES ENH: During ipc2581 export checkboxes corresponding to 縈iscellaneous Image Layers� should automatically get selected! m, o6 z$ Y. e9 P6 p0 P
1198340 ALLEGRO_EDITOR OTHER Multiple -product option on the Allegro command line does not access the second -product
1 g R9 Z ~" B( I9 m/ J% k1198596 ALLEGRO_EDITOR INTERFACES When copper thickness is increased for the outer layers, step Viewer does not show correct component position.! ?7 G. Y. h. N) J1 c7 L! I+ m
1199673 PCB_LIBRARIAN OTHER Component Browser fails to load footrpints if they are set with UNC path
5 J) F% u. I3 I: E1199889 ALLEGRO_EDITOR DATABASE Allegro crashing with latest hotfix.
' G% N8 Y/ v8 }5 |& M1200303 ALLEGRO_EDITOR GRAPHICS 3D Viewer does not update after changing STEP model mapping% t4 f* y. d: d5 d( f
1200449 ALLEGRO_EDITOR REPORTS Allegro crashes when generating Net Loop Report.
8 \4 O4 J( v7 Z V+ k" _1200915 ALLEGRO_EDITOR DATABASE Reducing accuracy of this specific design crashes Allegro
8 @/ G1 N: A! w' D) d5 X n1201011 ADW COMPONENT_BROWSE Component Browser crashes in DB mode
# f3 S# H1 h* k- R3 s. o+ a1201376 ALLEGRO_EDITOR INTERFACES Allegro hangs when trying to map a specific STEP model to a package drawing.. [/ Q- C2 E3 a) Y2 U0 q7 C$ i2 U) ^
1201897 SIP_layout IMPORT_DATA BGA Pin Colors not matching the Colors defined in the Symbol Spreadsheet after updating.1 x7 |2 z& Y$ r) L8 E
1202709 ALLEGRO_EDITOR INTERFACES STEP File generated from Allegro is not overwritten when the variable "set ads_textrevs
) X/ q0 ]: m: t% W9 _- Z1202820 ALLEGRO_EDITOR INTERFACES Different xml generation for same step model on S106 and S017/ c0 {# v1 `& h+ Q Z" u( ^/ v
1202842 ALLEGRO_EDITOR INTERFACES Step model invisible for one pin dra in allegro 16.6 symbol editor) `6 n' d" v+ d5 A6 i+ B6 V& `
1202983 ALLEGRO_EDITOR SHAPE Shape voiding creates DRC with Route Keepout0 I/ S* T5 d" T2 ?% {, v
1203125 ALLEGRO_EDITOR OTHER Exporting STEP file with External copper enabled does not show all copper when viewed with Solid Edge or Inventor+ F! b2 ?1 Z# d- S5 x+ A
1203236 ALLEGRO_EDITOR INTERFACES IPC2581 output with crosshatched shape is not correct! L, n5 t6 z' J5 x5 f8 o) a4 H% F- o
1203995 CONCEPT_HDL CHECKPLUS CheckPlus rule, local_signal_no_offpage_body, getting an incorrect failure.
1 @0 b. X6 S% u! a4 ?5 n1204629 ALLEGRO_EDITOR SKILL axlUIDataBrowse crashes the editor or returns error0 A6 {$ s! A7 E, q
1204640 SIP_LAYOUT DIE_EDITOR Concurrent co-design update fails
/ R, l" d: q o6 N, I# i3 {) \1204881 SIP_LAYOUT BGA_GENERATOR Pin numbers are messed up after deleting a pin at a staggered bga
5 F2 v" P$ x$ W) Q! B( o: L1 Y1204885 CONCEPT_HDL CONSTRAINT_MGR Cant assign discrete models after the wrong model was removed.
- @8 n/ l& }( N9 Q. w9 f! Q( R1205374 ALLEGRO_EDITOR OTHER pdf out command creates incorrect drill Symbol Characters placement in pdf file when setting film mirrored./ e4 i# F" ]4 |
1205729 SIP_LAYOUT DIE_EDITOR update of codesign db fails on exit from die editor# k7 n {7 @8 r6 o% e- \% N
1205801 ALLEGRO_EDITOR OTHER Tool crash when do export IPF.( H1 A3 I6 d, r7 h4 i7 n4 h
1205881 CONSTRAINT_MGR OTHER In CMGR , Objects > Create crashes Allegro
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